Design of Spectrum Processing Chiplet Based on FFT Algorithm
With the rapid development of electronic information and computer science, the fast Fourier transform (FFT) has played an increasingly important role in digital signal processing (DSP). This paper presented a spectrum processing chiplet design method to solve slow speed, low precision, and low resource utilization in spectrum processing of general-purpose spectrum chips and field programmable gate array (FPGA). To realize signal processing, the Radix-2 4096-point FFT algorithm with pipeline structure is used to process spectral signals extracted from the time domain. To reduce the harm caused by spectrum leakage, a windowing module is added to optimize the input data, and the clock gating unit (CGU) is used to perform low-power management on the entire clock reset. The result shows the chiplet takes 0.368 ms to complete a 4096-point frequency sweep under a clock frequency of 61.44 MHz. The chiplet significantly improves speed and accuracy in spectrum processing, which has great application potential in wireless communication.
| Medienart: |
E-Artikel |
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| Erscheinungsjahr: |
2023 |
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| Erschienen: |
2023 |
| Enthalten in: |
Zur Gesamtaufnahme - volume:14 |
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| Enthalten in: |
Micromachines - 14(2023), 2 vom: 07. Feb. |
| Sprache: |
Englisch |
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| Beteiligte Personen: |
Meng, Baoping [VerfasserIn] |
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| Links: |
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| Themen: |
Chiplet |
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| Anmerkungen: |
Date Revised 27.02.2023 published: Electronic Citation Status PubMed-not-MEDLINE |
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| doi: |
10.3390/mi14020402 |
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| funding: |
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| Förderinstitution / Projekttitel: |
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NLM353442313 |
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| 500 | |a Citation Status PubMed-not-MEDLINE | ||
| 520 | |a With the rapid development of electronic information and computer science, the fast Fourier transform (FFT) has played an increasingly important role in digital signal processing (DSP). This paper presented a spectrum processing chiplet design method to solve slow speed, low precision, and low resource utilization in spectrum processing of general-purpose spectrum chips and field programmable gate array (FPGA). To realize signal processing, the Radix-2 4096-point FFT algorithm with pipeline structure is used to process spectral signals extracted from the time domain. To reduce the harm caused by spectrum leakage, a windowing module is added to optimize the input data, and the clock gating unit (CGU) is used to perform low-power management on the entire clock reset. The result shows the chiplet takes 0.368 ms to complete a 4096-point frequency sweep under a clock frequency of 61.44 MHz. The chiplet significantly improves speed and accuracy in spectrum processing, which has great application potential in wireless communication | ||
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| 700 | 1 | |a Shan, Guangbao |e verfasserin |4 aut | |
| 700 | 1 | |a Zheng, Yanwen |e verfasserin |4 aut | |
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